Sr Staff Layout Engineer
Core
Designing analog circuits (charge pumps, comparators, amplifiers, bandgaps, linear regulators) from block level to full chip for DC-DC converters, controllers, and drivers.
Role type
Senior Staff Analog Layout Engineer
Builds
High-quality analog IC layouts for power management and control products
Domain
Semiconductor / Analog IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Analog layout design, floor planning, leaf cell layout, analog layout matching, EM design, reliability design, DRC/LVS flows, IC packaging knowledge, CAD tool expertise (Virtuoso XL, Calibre)
Preferred skills
SKILL coding, Python/Perl/TCL scripting, BCD node processing knowledge, advanced IC CAD tools proficiency, IP portability methodology
Technologies
Virtuoso XL, Calibre DRC, Calibre LVS, Calibre PEX, Calibre PVS, Calibre R3D, SKILL, Python, Perl, TCL
Responsibilities
Floorplan and layout typical analog circuits independently, drive design innovation and best practices, collaborate with cross-layout teams globally, minimize rework through close design collaboration
Seniority
Senior Staff, hands-on IC design
