Advanced Packaging SI/PI Engineer
Core
Ensuring electrical performance of AI accelerator platforms across silicon, package, and board levels, focusing on high-power delivery and high-speed signaling.
Role type
Senior IC Signal & Power Integrity Engineer (Advanced Packaging)
Builds
AI accelerator platforms with high-throughput inference capabilities
Domain
Semiconductor hardware, AI infrastructure, advanced packaging
Deliverable
production ML models | product features
Required skills
Signal integrity analysis, Power delivery network design, High-speed interface design (112G/224G), Interposer/substrate layout, Ball map/C4/BGA pin assignment, PDN decoupling strategy, IR drop analysis, Test vehicle design
Preferred skills
Multi-die 2.5D/3D packaging co-design, RTL-to-GDSII context, OSAT/ODM coordination, ML/LLM architecture familiarity
Technologies
ANSYS HFSS, SIwave, Cadence Sigrity, Keysight ADS, CoWoS
Responsibilities
Analyze and optimize SI/PI in 2D/2.5D/3D packages, Drive SI requirements into interposer/substrate layout, Own PDN design and decoupling strategy, Manage ball map/C4/BGA pin assignment, Support board-level SI/PI and rack-level topology studies, Correlate SI/PI test vehicles with silicon measurements
Seniority
Senior, hands-on IC
