Principal Analog Mixed-Signal Design Verification Engineer
Core
Lead mixed-mode design verification methodology, define co-simulation EDA environments, and develop models for complex System-on-Chip (SoC) simulation to support space-based connectivity systems.
Role type
Principal Analog Mixed-Signal Design Verification Engineer
Builds
Co-simulation EDA infrastructure and behavioral models for analog/mixed-signal SoCs
Domain
Aerospace / Analog Mixed-Signal (AMS) Verification
Required skills
CMOS analog mixed-signal circuit design, Verilog/SystemVerilog modeling, EDA tool proficiency (Cadence Virtuoso), Python/MATLAB scripting, block-level and chip-level verification methodologies
Preferred skills
FinFET technology node verification, PhD in Computer/Electrical Engineering
Technologies
Cadence Virtuoso, Python, MATLAB, Verilog, SystemVerilog
Responsibilities
Define co-simulation methodology and EDA infrastructure, create Verilog/SystemVerilog test benches and behavioral models, develop mixed-mode verification methodologies, support model bring-up, perform AMS simulations
