Senior Engineer Design For Test (DFT)
Core
Own the implementation and verification of DFT logic at both RTL and gate level for microcontroller products, supporting the journey from RTL through silicon bring-up and production.
Role type
Senior IC DFT Engineer
Builds
Testable microcontroller silicon
Domain
Semiconductor / Digital Design
Required skills
DFT flows (Scan, ATPG, LBIST, MBIST), RTL design and verification, digital design flow, Tcl, Python
Preferred skills
None stated
Technologies
Scan, ATPG, LBIST, MBIST, Tcl, Python
Responsibilities
Own DFT implementation and verification at RTL and gate level; Execute and debug key DFT activities; Verify DFT implementation and analyze coverage; Drive DFT flow automation; Collaborate with design, verification, and physical design teams; Support silicon bring-up and production test debugging; Identify technical gaps and drive continuous improvement.
Seniority
Mid-level (1–3 years experience), hands-on IC
