Senior DFX Engineer
Core
Design and deliver ASICs with a focus on Size/complexity, Test Quality, Reliability, Power, and Performance targets across the silicon lifecycle.
Role type
Senior IC DFX Engineer (ASIC/SOC)
Builds
ASICs and SOCs for Ericsson Radio and Baseband Products
Domain
Semiconductor / ASIC Design / Silicon Lifecycle Management
Required skills
SOC/IP/ASIC design, DFX (DFT/DFD/DFM), DFX Verification (Memory BIST, JTAG, Boundary Scan, In-field Tests), ATPG, Scan, IEEE 1149.1/1687/1838 standards, Silicon Lifecycle Management (telemetry, diagnostics, RAS), Physical design implementation flows, Automation & infrastructure, AI/ML for engineering workflows
Preferred skills
Experience with EDA Vendors and CAD teams, Post silicon debug and yield bring up, Mentoring junior engineers
Technologies
JTAG, iJTAG, BIST, IEEE 1149.1, IEEE 1687, IEEE 1838, EDA tools, AI/ML frameworks
Responsibilities
Strategize and architect DFT and SLM capability across multiple ASIC programs, Extend silicon lifecycle capability in the field (in-system test, telemetry, monitoring, diagnostics), Partner with Test Team to define overall Test Strategy, Partner with Physical Design teams to develop complex SOCs, Apply AI to automate flows and accelerate debug/triage, Mentor and coach junior engineers
Seniority
Senior, hands-on IC with mentorship responsibilities
