System & Advanced Packaging Design Lead
Core
Directing signal integrity for package, PCB, and system design for copper interconnects beyond 200G, enabling advanced packaging for drivers, TIAs, and optics for AI scale-up engines, including micro-LED and heterogeneous package development.
Role type
Senior IC system & advanced packaging design lead
Builds
2.5D/3D and heterogeneous packages for co-packaged driver, TIA, and optical engines; micro-LED packaging solutions
Domain
Semiconductor packaging, high-speed interconnects, AI data center infrastructure
Required skills
Signal integrity (SI) for multi-GHz serial links, Power integrity (PI) and thermal strategy, Substrate stackup and ballmap optimization, 3D EM extraction and channel simulation, OSAT and supplier management, Reliability and JEDEC qualification, High-speed connector/cable interface design
Preferred skills
Co-packaged optics experience, Micro-LED packaging, UCIe and chiplet interconnect knowledge, HVM ramp experience at leading OSATs
Technologies
HFSS, Q3D, ADS, SIwave/PowerSI, Cadence APD/Allegro, Icepak, FloTHERM
Responsibilities
Define package-level power integrity and thermal strategy, Lead lab characterization including VNA/TDR measurements and BER testing, Manage OSAT and substrate supplier strategy, Coordinate cross-functional execution across silicon design and manufacturing partners, Perform 3D EM extraction and channel simulation, Author package design guidelines and review checklists
Seniority
Senior, hands-on IC
