Principal ASIC Package Design Engineer
Core
Lead advanced ASIC package architecture and execution for high-performance mixed-signal and digital SoCs, focusing on flip-chip BGA and multi-chip module solutions.
Role type
Principal ASIC Package Design Engineer
Builds
High-power satellite platforms for missions from LEO to deep space
Domain
Aerospace / Semiconductor Packaging
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
FC-BGA design, MCM solutions, substrate stack-up, power delivery network design, signal integrity analysis, thermal architecture, OSAT/vendor management, SI/PI simulation, high-pin-count ASIC packaging
Preferred skills
Heterogeneous integration, chiplets, interposers, high-speed digital SoCs, aerospace electronics, packaging strategy definition
Technologies
SIWave, HFSS, ADS
Responsibilities
Own ASIC package architecture for FC-BGA and MCM solutions; Lead package-level trade studies across cost, performance, power integrity, signal integrity, thermal, manufacturability, and reliability; Define long-term packaging roadmap aligned with future ASIC nodes; Establish organizational package design standards and methodologies; Drive detailed design of FC-BGA packages for high-pin-count ASICs; Define and review substrate stack-ups, via strategies, impedance control, and escape routing; Partner with silicon, RF, and systems teams to co-optimize die floorplans and package interfaces; Own package-level SI/PI strategy including high-speed digital interfaces and decoupling strategy; Lead thermal architecture at the package level; Manage relationships with external packaging vendors, substrate suppliers, and OSATs; Drive material selection, substrate technology choices, and assembly process optimization
Seniority
Principal, hands-on IC
