Senior Logical Design Engineer
Core
Design and implement high-performance, power-efficient digital systems at the Register Transfer Level (RTL) to overcome hardware constraints for next-generation AI inference.
Role type
Senior IC RTL Design Engineer
Builds
High-performance silicon chips and digital systems for AI inference
Domain
Semiconductor hardware design / AI infrastructure
Deliverable
production ML models
Required skills
RTL design, digital system architecture, performance optimization, power efficiency, pipelining, clock-domain crossing, power gating, simulation, formal verification
Preferred skills
High-speed design methodologies, low-power design methodologies, module partitioning, interface specification
Technologies
RTL, simulation tools, formal verification tools
Responsibilities
Develop and maintain RTL specifications for digital designs, implement complex design modules focusing on performance and power, define design tasks including partitioning and interface specifications, collaborate with verification engineers for functional correctness, document RTL design methodologies and ensure standards compliance
Seniority
Senior, hands-on IC
