Senior Digital Design Engineer
Core
Developing micro-architecture and front-end circuit design for high-performance network controllers.
Role type
Senior Digital Design Engineer (RTL/Synthesis)
Builds
High-performance network controllers and connectivity solutions
Domain
Semiconductor hardware design / AI infrastructure connectivity
Required skills
RTL design, synthesis, IP integration, high-speed protocol knowledge (PCIe, Ualink, Ethernet), DFT, UVM verification, silicon bring-up/debug, Synopsys/Cadence tools
Preferred skills
Python scripting, PCIe/Ethernet switch product development
Technologies
Synopsys, Cadence, UVM, PCIe, Ualink, Ethernet, CXL, NVLink, PCIe, UALink
Responsibilities
Develop micro-architecture and front-end circuit design; perform RTL coding, simulation, and synthesis; integrate IP blocks; debug silicon bring-up; verify designs using UVM.
Seniority
Senior, hands-on IC
