SR ENGINEER, ADVANCED PROCESS DEVELOPMENT
Core
Develop, optimize, and qualify hybrid bonding and advanced die stacking assembly processes for next-generation HBM and memory products.
Role type
Senior IC process development engineer (advanced packaging)
Builds
Hybrid bonding paths, C2W activities, and advanced die-stacking integration for HBM4/HBM4E products
Domain
Semiconductor manufacturing / Advanced packaging
Required skills
DOE, SPC, process capability, statistical analysis, FMEA/pFMEA, root-cause analysis, process optimization, NPI methodology, technology transfer, equipment qualification, yield improvement
Preferred skills
Hybrid bonding (Cu-Cu, W2W), direct bonding, high-accuracy die stacking, wafer-level packaging, contamination control, defect analysis
Technologies
pFMEA, 8D Problem Solving, KT analysis, Five Whys Technique
Responsibilities
Develop and maintain process specifications, control plans, and manufacturing documentation; Lead equipment evaluation and process/tool qualification; Execute structured root-cause analysis for yield and quality issues; Analyze experimental data to identify key process parameters; Support cross-site technology transfer and NPI readiness; Drive continuous improvement in yield, quality, and cycle time.
Seniority
Senior, hands-on IC