STAFF ENGINEER, ASIC LAYOUT
Core
Designing high-speed analog ASIC layouts for memory and storage solutions.
Role type
Staff IC ASIC Layout Engineer
Builds
High-performance DRAM, NAND, and NOR memory chips
Domain
Semiconductor / Analog IC Design
Required skills
High-speed analog layout, floorplanning, power planning, parasitic optimization, device matching, EDA tools (Virtuoso), DRC/LVS, EM/IR flows, scripting (SKILL), abstract view generation
Preferred skills
AI tools (Co-pilot, Claude code)
Technologies
Virtuoso, SKILL, 16nm technology nodes
Responsibilities
Create floorplans, perform power planning, optimize parasitics, ensure device matching, generate abstract views, run DRC/LVS and EM/IR flows
Seniority
Staff, hands-on IC
