CareerPlan

Senior SOC Physical Design Engineer

San Diego, California, United States of AmericaFull-time$131k–$173k2026-09-17 → 2026-11-10

Core

Independently plans and performs physical design flow for high-speed DDR, graphics, micro-architecture, and SoC products, focusing on power utilization and optimization.

Role type

Senior IC physical design engineer (SoC)

Builds

System-on-chip (SoC) products

Domain

Semiconductor / Hardware Design

Required skills

Floor Planning, Clock Tree Synthesis, Place and Route, Power Distribution Network (PDN), Timing analysis and closure, Physical verification (LVS, DRC, DFM, DFY), Cross-functional collaboration

Responsibilities

Floor Planning, Clock Tree Synthesis, Place and Route, PDN, Timing analysis and closure, Physical verification checks (LVS, DRC, DFM, DFY), Providing schedules and support for cross-functional engineering effort to drive signoff closure for tapeout, Contributing to design reviews and project meetings

Seniority

Senior, hands-on IC