Staff/Principal, APTD CEM - Advanced Packaging Wafer Level Technology Engineering
Core
Lead post-fab wafer finishing process development for high-performance memory products (HBM) to enable deployment in manufacturing.
Role type
Staff/Principal Semiconductor Process Engineer (Advanced Packaging)
Builds
Wafer-level packaging solutions for high-bandwidth memory (HBM) and AI compute technologies
Domain
Semiconductor manufacturing / Advanced Packaging / Memory
Deliverable
production ML models
Required skills
Wafer thinning, backside metal interconnect, process modeling, statistical analysis, equipment evaluation, yield optimization, cross-functional integration
Preferred skills
Wafer bonding, plating, warpage control, AI tool integration
Technologies
Python, R, SQL, Visual Basic, E3, FDC, RMS
Responsibilities
Establish and improve wafer-level process conditions and technologies; Upgrade process capabilities and reduce production costs; Evaluate and promote new equipment and materials; Ensure defense coverage through process, measurement, inspection, and testing; Integrate AI-assisted tools to improve efficiency and quality; Coordinate technology development strategies with internal and external partners
Seniority
Staff/Principal, hands-on IC with strategic oversight