Sr Advanced Packaging Technology Development Engineer, Bonding process
Core
Drive HBM process development, yield improvement, and advanced packaging (chip stacking, 2.5D/3D) research and development.
Role type
Senior IC advanced packaging technology development engineer (bonding process)
Builds
High-bandwidth memory (HBM) and advanced packaging solutions for memory and storage applications
Domain
Semiconductor manufacturing, advanced packaging, materials science
Required skills
HBM process development, yield improvement, chip stacking, 2.5D/3D packaging, temporary bonding/debonding, hybrid bonding, fusion bonding, direct wafer bonding, surface activation, adhesion physics, interface energy, thermo-compression, plasma-assisted bonding, materials characterization, root cause analysis, test structure design, supplier management
Preferred skills
PhD in Chemistry/Physics/Materials/Engineering, hands-on experience with SUSS/EVG/TEL bonding tools, AI tool integration
Technologies
SUSS, EVG, TEL, WSS
Responsibilities
Drive HBM process development and yield improvement in WSS process; Assist advanced package technology (chip stacking, 2.5D or 3D) research and development; Support project on-site execution and make decisions as technical consultant; Troubleshoot complex problems, perform root cause analysis, and resolve process engineering issues; Generate internal and external documentation for presentations and technical reports; Coordinate mechanical characterization for advanced packaging development efforts globally; Provide recommendations for test structure and test vehicle design; Review, summarize, and present data with recommendations of materials and lead discussions with packaging material suppliers
Seniority
Senior, hands-on IC