Physical Design Engineer
Core
Implement and verify physical designs for AI chips (ASICs) optimized for specific model architectures like transformers.
Role type
Physical Design Engineer (Backend ASIC)
Builds
Model-specific ASICs (e.g., Sohu) for real-time video generation and deep reasoning
Domain
Semiconductor / AI Hardware / Physical Design
Deliverable
production ML models
Required skills
Physical Design flows, RTL synthesis to GDSII sign-off, 3nm-7nm timing closure, UPF low power design, formal verification, floorplanning, placement, CTS, routing, IR drop, EM/antenna analysis
Preferred skills
Transformer models and machine learning familiarity, OpenROAD flows, Python scripting
Technologies
EDA tools, UPF, OpenROAD, Python
Responsibilities
Supervise outsourcing of physical design to 3rd party services, run Physical Design flows to close blocks, optimize tool flows with EDA vendors, drive dashboards for project convergence, ensure block level closure
Seniority
Mid-level, hands-on IC