Signal Integrity Architect – System & IO Architecture
Core
Define SI architectural strategies for high-speed memory and system interfaces, performing early feasibility and scaling analysis for future data rates.
Role type
Senior IC Signal Integrity Architect (System & IO)
Builds
Hands-on channel models across package, board, and system
Domain
Semiconductor / High-speed memory and storage
Deliverable
production ML models
Required skills
SI modeling and simulation, transmission line analysis, jitter analysis, loss analysis, crosstalk analysis, high-speed interface design, architectural strategy definition, end-to-end co-design
Preferred skills
Memory interface expertise, high-speed IO standards knowledge, pre-silicon exploration experience, complex trade-off communication, AI/LLM productivity tool usage
Technologies
AI/LLM tools
Responsibilities
Define SI architectural strategies for high-speed memory and system interfaces, Perform early feasibility and scaling analysis for future data rates, Build hands-on channel models across package, board, and system, Drive end-to-end SI co-design with IO, package, and system architects, Translate SI insights into electrical requirements and architectural constraints
Seniority
Senior, hands-on IC
