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Design Verification Engineer - SoC

Austin💼 Full-time🗓 2026-04-16 → 2026-09-25

Core

Verify performance features of custom IPs (systolic arrays, DMA engines, NoCs) and correlate with performance models across the hardware-software stack.

Role type

Design Verification Engineer (SoC Performance)

Builds

Custom IPs for inference-focused AI chips

Domain

Semiconductor / AI Infrastructure

Deliverable

production ML models

Required skills

SystemVerilog, Python, performance verification, simulation, modeling, coverage analysis, RTL design, ASIC flows

Preferred skills

memory hierarchies, pipelines, interconnects, compute accelerators, compiler optimizations, workload tuning

Technologies

SystemVerilog, Python

Responsibilities

Develop test plans and infrastructure for performance tuning; create checkers and coverage monitors; debug performance issues on silicon; drive end-to-end performance tuning across the ASIC lifecycle.

Seniority

Mid-level, hands-on IC

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