Sr Principal Engineer- Switch Architecture
Core
Define architecture for next-generation Teralynx data center switch ASICs, driving product definition from concept to silicon.
Role type
Senior Principal Engineer (Switch Architecture)
Builds
Next-generation data center switch chips for cloud and AI clusters
Domain
Semiconductor / Networking / ASIC Design
Deliverable
production ML models | product features
Required skills
ASIC architecture, behavioral modeling, performance modeling, system-level tradeoff analysis, C/C++, Python
Preferred skills
multi-die/chiplet architectures, switch pipeline architectures, buffer management, traffic engineering, customer engagement
Technologies
C, C++, Python
Responsibilities
Define new features, pipelines, and protocols for switch chips; Deliver behavioral and performance models to validate architectural decisions; Drive end-to-end switch architecture from concept to silicon bring-up; Analyze tradeoffs across latency, throughput, memory, power, area, and QoS; Participate in customer-facing technical discussions; Contribute to long-term architectural direction and roadmap planning; Mentor engineers and share best practices.