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Principal Memory Design Engineer/Senior Technical Manager

San Jose, CA💼 Full-time🗓 2026-02-05 → 2026-07-22

Core

Architecting and defining high-performance memory circuits for Data Center AI, Networking, and Edge AI ASIC solutions.

Role type

Principal Memory Design Engineer / Senior Technical Manager

Builds

Custom semiconductor memory solutions (SRAM, TCAM, Compute-In-Memory, Near Memory Compute macros) for Data Center AI, Networking, and Edge AI applications.

Domain

Semiconductor design, High-Performance Compute (HPC), Data Center AI, Edge AI

Deliverable

production ML models | product features

Required skills

Memory circuit architecture, DTCO, custom SRAM design, dual-rail memory design, PPA optimization, digital circuit design, design methodology innovation, technical mentorship

Preferred skills

Experience with advanced technology nodes, collaboration with global CAD teams

Technologies

SRAM, TCAM, Compute-In-Memory (CIM), Near Memory Compute (NMC), advanced technology nodes

Responsibilities

Co-develop embedded memory architectures with Data Center AI ASIC customers, define and deliver customized memory solutions, lead DTCO and pathfinding initiatives, lead end-to-end design of dual-rail custom memories, drive innovation in specialized circuit integration, provide mentorship and technical direction, evaluate and implement new design methodologies

Seniority

Principal, hands-on IC with mentorship

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