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Analog Design Intern

Santa Clara, CA, US💼 Internship💰 $79,040–$158,080🗓 2026-09-26 → 2026-09-27

Core

Design transistor-level analog circuits from scratch or improve existing blocks for Marvell's Central Engineering IP portfolio.

Role type

Analog IC Design Intern

Builds

Transistor-level analog circuits and IP blocks

Domain

Semiconductor / Analog IC Design

Required skills

Analog circuit design, Cadence CAD tools, circuit simulation, circuit analysis, layout collaboration

Preferred skills

None stated

Technologies

Cadence

Responsibilities

Build or improve transistor-level circuits, simulate performance metrics, perform circuit analysis, collaborate on layout, iterate designs to production specifications

Seniority

Intern

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