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Analog and Mixed-Signal IC Design Engineer Intern

South San Francisco - SSF💼 Internship💰 $72,800–$72,800🗓 2026-06-22 → 2026-07-31

Core

Designing and implementing analog and mixed-signal chip architectures for high-bandwidth brain-machine interface applications.

Role type

Analog and Mixed-Signal IC Design Engineer Intern

Builds

Neural recording and stimulation system-on-chip (SoC) for brain-computer interfaces

Domain

Biomedical engineering / Neural interfaces / Semiconductor design

Deliverable

production ML models | product features | infrastructure

Required skills

Analog/mixed-signal integrated CMOS circuit design, Circuit architecture definition, Transistor-level circuit solutions, Simulation and analysis (power, performance, linearity, yield), Test design and execution, Bug analysis

Preferred skills

Scripting and automation for complex simulation, Lab testing of high-precision analog/mixed-signal ICs, Functional modeling with Verilog AMS and SystemVerilog, Design and layout with advanced CMOS FinFET technologies, Design for high-volume production

Technologies

CMOS, FinFET, Verilog AMS, SystemVerilog, Delta-sigma ADC, SAR ADC, DAC, VCO, PLL, DLL, Audio CODEC, Class D audio amplifier, high speed PHY, SERDES

Responsibilities

Define and implement optimal analog and mixed-signal circuit architectures to meet noise, mismatch, distortion, power, and cost requirements; Define verification plans and run complex simulations; Design, program, and run complex tests and review tests of other team members

Seniority

Intern

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