Senior Engineer - HIG HBM PSE
Core
Execute validation runs on HBM/IQP/ETV materials, debug test programs, and analyze high-speed I/O signal integrity for memory products.
Role type
Senior IC validation engineer (HBM/DRAM)
Builds
HBM memory chips and validation test flows
Domain
Semiconductor manufacturing / High-speed memory
Required skills
HBM validation flows, MBIST/Native Mode testing, Verilog simulation, Python scripting, C/C++, root cause analysis, statistical data analysis
Preferred skills
Linux environment, oscilloscope/logic analyzer usage, DRAM/HBM architecture knowledge, automation initiatives (via careerplan.io/jobs/39734300-senior-engineer-hig-hbm-pse-at-micron)
Technologies
SM3/Cobra, Advantest V93K, Python, Verilog, Git, Perforce, Confluence, Jira, IQP, ETV
Responsibilities
Execute validation runs on IQP/ETV materials, operate and debug test programs on SM3/Cobra and Advantest V93K, validate high-speed I/O and perform signal integrity checks, develop scripts for log parsing and data visualization, participate in root cause analysis sessions
Seniority
Senior, hands-on IC
