Analog Layout Engineer
Core
Develop high-quality layouts for complex analog and mixed-signal (AMS) IP blocks including voltage regulators, bandgap references, current sense amplifiers, and high-voltage switches for power management products.
Role type
Senior Analog Layout Engineer
Builds
Integrated circuit layouts for DC-DC PMICs, multiphase controllers, LED drivers, and SiC drivers
Domain
Semiconductor manufacturing / Power Management ICs
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Analog layout fundamentals, floor planning, power routing, latch-up/ESD design, DRC/LVS/ERC verification, DFM techniques, Unix OS proficiency, Cadence CDE environment usage
Preferred skills
Programming in SKILL, Perl, or Python, debugging LVS/DRC errors, area optimization techniques
Technologies
Cadence Virtuoso, Calibre, Mentor Graphics
Responsibilities
Create layouts from schematics, perform floor planning and power routing, execute design rule checks and verification, collaborate on optimal solutions, generate LEF files
Seniority
Senior, hands-on IC
