Design Verification (Senior to Senior Staff Engineer)
Core
Develop and implement verification plans for read channel storage IP designs, creating testbenches and performing functional/performance verification of complex digital designs for HDD and SSD electronics.
Role type
Senior to Senior Staff IC Design Verification Engineer
Builds
Custom SoC design for cloud data center storage technologies (ultra-fast read channels, high-performance processors, transceivers, cryptographic engines)
Domain
Semiconductor / ASIC Design / Storage (HDD/SSD)
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SystemVerilog, UVM, Python, Perl, ASIC design flow, digital design methodologies, EDA tools (Cadence, Synopsys, Mentor Graphics), Digital Signal Processing (DSP), C/C++
Preferred skills
Strong mathematical skills, problem-solving skills
Technologies
SystemVerilog, UVM, Python, Perl, Cadence, Synopsys, Mentor Graphics, C, C++
Responsibilities
Develop and implement verification plans for read channel storage IP designs; Create and maintain testbenches using industry-standard verification tools and methodologies; Perform functional and performance verification of complex digital designs; Collaborate with design and architecture teams to identify and resolve design issues; Analyze and debug simulation failures and provide detailed reports on verification results; Mentor and guide junior verification engineers
Seniority
Senior to Senior Staff, hands-on IC with mentorship
