DFT Engineer
Core
Direct and guide DFT strategy and execution for complex SoC and MCU designs targeting AI data center and humanoid system applications.
Role type
Senior DFT Engineer (Strategy & Technical Leadership)
Builds
Testable, reliable, and manufacturable silicon for AI data centers and humanoid systems
Domain
Semiconductor / Digital IC Design
Deliverable
production ML models | product features | infrastructure
Required skills
DFT methodologies (scan insertion, ATPG, BIST, JTAG, boundary scan, test compression), EDA tools (Synopsys TestMAX, Mentor Tessent), SoC/MCU architecture knowledge, team selection and mentorship
Preferred skills
Embedded systems or MCU product development background, silicon bring-up, failure analysis, yield improvement
Technologies
Synopsys TestMAX, Mentor Tessent
Responsibilities
Execute DFT strategy across complex SoC and MCU designs, collaborate cross-functionally to integrate DFT early, drive continuous improvement in test coverage and fault detection, select and mentor personnel for the DFT function
Seniority
Senior, hands-on IC with leadership responsibilities
