Sr Analog Physical Design Engineer | Kilby Labs
Core
Senior Analog Physical Design Engineer responsible for managing circuit layouts from floor planning to fabrication, collaborating with design teams on test/production dies, and leading technical guidance for layout projects.
Role type
Senior Analog Physical Design Engineer
Builds
Test and production dies, custom lead-frames, and new process/device development vehicles
Domain
Semiconductor manufacturing, analog circuit design, and packaging
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Circuit layout management, floor planning, layout reviews, verification, electro migration analysis, thermal gradient analysis, layout parasitics analysis, ESD and latchup identification, back annotation support, contract engineer mentorship, process node familiarity (lbc, cmos, bicmos, gan), database management, JUMP updates, power/rf/sensor layout techniques
Preferred skills
Stakeholder relationship building, verbal and written communication, analytical and problem-solving skills, initiative, time management, new tool implementation, rapid system ramp-up, Cadence Allegro, TOTEM, Pcell Designer
Technologies
Cadence Allegro, TOTEM, Pcell Designer, Pcell Designer
Responsibilities
Collaborate with design teams to understand architecture and requirements for test/production dies; Lead projects by providing technical guidance, planning, timelines, and resource assignments; Conduct layout reviews and confirm verifications; Work with packaging teams to develop custom lead-frames; Collaborate with ATD and PDK teams on new process and device development; Analyze and close Electro Migration, Thermal gradients, and layout parasitics; Identify ESD and latchup issues; Provide back annotation support; Mentor and guide contract layout engineers in India
Seniority
Senior, hands-on IC with team leadership
