CareerPlan

ASIC DFT Technical Leader

San Jose, California, USFull-time$187k–$268k2026-10-19 → 2026-11-10

Core

Drive high-quality Structural test, functional test, diagnostic feature implementation, IP development, and test access for advanced networking silicon.

Role type

Senior IC ASIC DFT Technical Leader

Builds

Cisco Silicon One hardware platforms for Switching, Routing, and Wireless products

Domain

Semiconductor / ASIC Design / Networking Hardware

Required skills

ASIC digital design, Verilog/System Verilog, front-end verification tools (simulation, linting, CDC, synthesis, formal), interface protocols (AMBA AXI/APB/AHB, JTAG), memories

Preferred skills

Power optimization (UPF), MBIST, post-silicon debug

Technologies

Verilog, System Verilog, AMBA, JTAG, UPF

Responsibilities

Collaborate with RTL and physical design teams to understand chip architecture, implement diagnostic features and test access mechanisms, ensure robust silicon solutions meeting performance standards

Seniority

Senior, hands-on IC