Director, Physical Design (Silicon One)
Core
Lead the physical design implementation of complex SoCs for Cisco's Silicon One architecture, optimizing PPA goals and managing execution schedules for advanced process nodes.
Role type
Director, Physical Design (Silicon One)
Builds
ASICs for core Switching, Routing, and Wireless products
Domain
Semiconductor / Hardware Design
Required skills
SoC Physical Design, PPA Optimization, Advanced Process Nodes, Team Leadership, Cross-Functional Collaboration, Automation Infrastructure, Quality Assurance (EMIR, Timing Signoff), Front-End/Back-End ASIC Flows
Preferred skills
PnR and Sign-off tools, Block-level synthesis, Place and route, Timing closure, Power/integrity analysis, Tcl/Python scripting, Static Timing Analysis (STA)
Responsibilities
Develop and manage SoC execution schedules; Own PPA optimization of floor-plans and interconnects; Lead a world-class team of Physical Design and integration engineers; Collaborate with global teams (RTL, NPI, Packaging, DFT); Build automation utilities to optimize area and speed; Conduct design reviews and timing signoff closure; Build and scale high-performing teams.
Seniority
Director, hands-on IC with management responsibilities