ASIC Packaging Development Technical Leader
Core
Lead technical development and integration of advanced semiconductor packaging solutions (2.5D/3D, CoWoS, Co-Packaged Optics/Copper) for high-performance ASICs.
Role type
Senior IC ASIC Packaging Development Technical Leader
Builds
Advanced packaging modules, substrates, and assembly processes for high-performance network ASICs
Domain
Semiconductor manufacturing / Advanced packaging / Hardware infrastructure
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Advanced packaging technology development (2.5D/3D, heterogeneous integration), CoWoS assembly flow expertise, substrate manufacturing process knowledge, package warpage/stress/thermal optimization, DfM/DfR principles, OSAT/substrate supplier management, large body package assembly, material selection for high layer count stacks
Preferred skills
Advanced problem-solving methodologies (8D, FMEA, SPC), package reliability analysis (component/board level)
Technologies
2.5D/3D integration, RDL CoW, Co-Packaged Optics, Co-Packaged Copper, CoWoS, multi-layer core technology
Responsibilities
Develop test vehicle strategy and design for advanced package technologies, engage with assembly suppliers to define process integration and flow, evaluate and qualify new package technologies, work with substrate suppliers to optimize materials for warpage and SI/PI performance, resolve design challenges with physical design teams, develop solutions for large die reticle assembly and board-mount processes
Seniority
Senior, hands-on IC technical leadership
