Senior Silicon Substrate & Packaging Manufacturing Engineer
Core
Own packaging manufacturing execution in Taiwan, driving products from first silicon through high-volume production for advanced AI compute systems.
Role type
Senior Silicon Substrate & Packaging Manufacturing Engineer
Builds
AI silicon substrates and advanced packaging solutions
Domain
Semiconductor manufacturing / AI hardware
Deliverable
production ML models
Required skills
Semiconductor packaging manufacturing, NPI leadership (EVT/DVT/PVT), yield management, root-cause analysis, SPC and process capability metrics, supplier management (OSATs), flip-chip assembly flows, substrate warpage control, failure analysis
Preferred skills
AI/HPC ASIC experience, 2.5D or HBM packaging, startup ramp experience
Technologies
FC-BGA, OSAT processes, substrate materials
Responsibilities
Define packaging manufacturing readiness criteria, lead NPI builds with yield targets, manage assembly yield and excursion response, act as technical escalation point for suppliers, execute qualification and reliability closure, define ramp plans and cost-down initiatives
Seniority
Senior, hands-on IC
