Pre-Silicon Digital Verification Engineer
Core
Verify complex digital IP blocks within mixed-signal ASICs to ensure bug-free designs for Apple's hardware products.
Role type
Pre-silicon digital verification engineer (mixed-signal ASIC)
Builds
Verification testbenches, testcases, and verification environments for digital control blocks
Domain
Semiconductor / Mixed-signal integrated circuits
Required skills
System Verilog, UVM, formal verification, constrained random verification, code coverage analysis, functional coverage analysis, block-level specification creation, testbench architecture, debugging digital test failures
Preferred skills
Object-oriented programming, clock domain crossing verification, analog circuit design fundamentals, chip-level verification environment architecture
Technologies
System Verilog, UVM, formal verification tools, analog mixed signal simulation tools
Responsibilities
Collaborate on precise design specifications for digital control blocks; Create block and chip-level verification plans; Architect and create block-level verification elements; Develop drivers, tests, reference models, and checkers; Debug test failures and coordinate fixes with designers; Track progress and gauge tapeout readiness using functional and code coverage.
Seniority
Mid-level, hands-on IC
