CareerPlan

Power Engineer

Cupertino, United States of AmericaFull-time$154k–$225k2026-11-05 → 2026-11-10

Core

Research, prototype, and validate novel low power methods for ASIC designs, focusing on energy efficiency, functionality, and reliability.

Role type

Senior IC power engineer (ASIC/RTL)

Builds

Low power ASIC designs, validation utilities, and automation scripts for design workflows

Domain

Semiconductor design, low power electronics, EDA

Required skills

Low power ASIC design, RTL design, logic design, CMOS/mix-signal circuit simulation, CAD tool development, Tcl/Python/Perl scripting, power and timing analysis, EDA flows

Preferred skills

N/A

Technologies

RTL, CMOS, mix-signal circuits, Tcl, Python, Perl, EDA tools

Responsibilities

Research new low power methods and power intent verification; Review current design flows to identify power reduction scope; Prototype test designs in RTL and circuits; Synthesize and validate low power designs; Develop software to automate design modifications; Estimate power savings and assess system-level impact; Design and simulate energy efficient circuits; Modify standard cell designs to minimize power consumption; Validate new CAD tools and features.

Seniority

Senior, hands-on IC