PMU Analog Mixed-Signal Design Verification Engineer - Experienced (m/fd)
Core
Verify next-generation Power Management Unit (PMU) chips and IPs, ensuring high-quality silicon for tape-out.
Role type
Senior IC analog mixed-signal verification engineer
Builds
Production integrated circuits (PMUs)
Domain
Semiconductor / Analog Mixed-Signal
Required skills
Verilog-AMS modeling, state-of-the-art verification test bench development, analog behavior analysis, mixed-signal design sign-off, specification compliance verification, scalable verification environment development, coverage planning, failure debug
Preferred skills
Hardware descriptive languages (Verilog, System-Verilog), scripting (TCL, Python, Perl), analog behavioral modeling, verification methodologies (simulators, coverage collection), power management circuitry knowledge (switching/linear converters, band-gaps, data converters)
