Circuit Design Engineer - Library/Process Monitor
Core
Design standard cell circuits and optimize library architecture for deep submicron processor technologies to improve performance, power, and area (PPA) for millions of customers.
Role type
Senior IC circuit design engineer (standard cell library & process monitor)
Builds
Standard cell libraries, process monitor IP, and custom digital circuits for CPU, SOC, and GPU architectures
Domain
Semiconductor / Deep submicron processor design
Required skills
Transistor-level circuit design, layout optimization, parasitic reduction, PPA optimization, standard cell development, PNR block design, testchip validation
Preferred skills
High-performance flip-flop design, level shifter design, retention flop design, RTL2GDSII flow, Static Timing Analysis (STA)
Technologies
Deep submicron PDKs, PNR tools, STA tools
Responsibilities
Discuss and optimize library architecture to improve overall Library PPA; Drive layout optimization to reduce parasitics; Develop standard cell circuits to push design PPA; Work on PNR block to design process monitor IP and validate IPs in testchips; Engage with CPU, SOC, and GPU teams on physical design requirements.
Seniority
Mid-Senior, hands-on IC
