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Experienced Mixed Signal Design Verification Engineer

Livorno, Italy💼 Full-time🗓 2026-07-09 → 2026-09-28

Core

Develop comprehensive verification test plans, design test benches, models, and stimulus vectors to verify Power Management Units for portable devices.

Role type

Senior IC mixed-signal design verification engineer

Builds

Power Management Units for portable devices

Domain

Consumer electronics / Analog Mixed Signal (AMS)

Deliverable

production ML models

Required skills

System Verilog, Verilog AMS, Python, Perl, TCL, analog design analysis, digital design analysis

Preferred skills

UVM, Assertion Based Verification, Functional Coverage, Formal Verification, AI/ML for verification, state-of-the-art EDA tools

Responsibilities

Collaborate with architecture, analog, digital, and software teams to ensure specification compliance; design and implement test benches and models at different abstraction levels; develop high-coverage stimulus vectors, tools, monitors, and checkers; communicate verification status and results to multiple subject areas.

Seniority

Senior, hands-on IC

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