USB Design Verification Leader
Core
Lead AMS IP Design Verification using UVM-based environments to establish and enhance verification capabilities for AMS IP or Chip DV teams.
Role type
Senior IC Design Verification Engineer (AMS)
Builds
Scalable and portable test benches, test cases, drivers, checkers, assertions, and reference models for RTL and Gate Level simulations.
Domain
Analog/Mixed-Signal (AMS) Integrated Circuits
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
UVM-based verification, AMS DV skills, test bench development, test suite building, coverage closure, RTL simulation, Gate Level simulation
Preferred skills
Digital DV skills, scalable verification methodologies, process improvement
Technologies
UVM, RTL, Gate Level simulators
Responsibilities
Develop configurable test benches, drivers, and checkers; build test suites to meet functional and code coverage goals; collaborate with global architecture, design, and post-Silicon testing teams; improve AMS DV processes for quality and efficiency.
Seniority
Senior, hands-on IC