CPU Physical Electrical Analysis Engineer
Core
Drive block and top-level EMIR/electrical verification closure and power grid design for CPU block-level implementation.
Role type
Senior IC physical electrical analysis engineer
Builds
CPU blocks and System-on-Chip (SOC) level IP
Domain
Semiconductor hardware design (CPU/VLSI)
Required skills
silicon level power delivery analysis, electromigration analysis, IR drop analysis, PNR tool environment usage, SAPR/EMIR flow automation scripting, debugging large-scale design data, design sensitivity isolation
Preferred skills
high-performance and low-power VLSI design implementation, SAPR/PNR design flow infrastructure, deep sub-micron technology challenges, Apache Redhawk, Cadence Voltus, PNR implementation, layout tools, static timing analysis (STA)
Responsibilities
Drive block and top-level EMIR/electrical verification closure; Work on power grid design, construction, and implementation; Collaborate with CAD/EDA vendors, implementation teams, and SOC level teams to ensure analysis fidelity and design sign-off closure.
Seniority
Senior, hands-on IC
