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CPU Physical Design and Integration Engineer

Santa Clara, United States of America💼 Full-time🗓 2026-05-04 → 2026-09-28

Core

Physical design, integration, and verification of high-performance, low-power processor development.

Role type

CPU Physical Design and Integration Engineer

Builds

High-performance, low-power processor chips

Domain

Semiconductor / CPU Design

Required skills

Place and route (PnR), physical verification, Perl/Tcl scripting, block partitioning, pin placement, chip-level layout database construction, flow development, automation scripting

Preferred skills

Industry-standard PnR tools, DRC/LVS verification, Python, CMOS circuit design, layout design, extraction, STA, EMIR concepts

Technologies

Perl, Tcl, Python, PnR tools, DRC/LVS, STA, EMIR

Responsibilities

Own chip-level place and route (PnR) and final CPU layout database construction; Collaborate with Implementation/CAD teams for signoff closure; Work with SOC teams to meet IP technical and delivery requirements; Participate in flow development for chip integration and analysis; Automate tasks and improve debug efficiency using scripting including genAI initiatives

Seniority

Mid-level, hands-on IC

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