CPU Design Timing Engineer
Core
Responsible for timing closure of CPU projects, including developing timing flows, performing static timing and noise analysis, and collaborating with micro-architects and implementation teams.
Role type
CPU Design Timing Engineer
Builds
High-speed digital CPU designs
Domain
Semiconductor hardware design, CPU microarchitecture
Required skills
static timing analysis, noise analysis, variation modeling, TCL scripting, Perl or Python
Preferred skills
PrimeTime/Tempus tool experience, physical design methodology (synthesis, PnR, extraction), deep sub-micron technology knowledge, CPU microarchitecture understanding, data parsing and plotting
Technologies
PrimeTime, Tempus, TCL, Perl, Python
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