CPU CDC/STA Engineer
Core
Developing, maintaining, and improving CDC, RDC, and STA constraints and methodology for CPU designs across multiple sites.
Role type
Senior IC CPU CDC/STA Engineer
Builds
CPU designs for Apple hardware products
Domain
Semiconductor hardware design
Required skills
CDC sign-off, RDC sign-off, STA checks, System Verilog assertions, TCL scripting, Perl scripting, Verilog
Preferred skills
Static Timing Analysis (STA), Clock-Domain Crossing (CDC), Reset Domain Crossing (RDC), Design Verification (DV) Simulations, Spyglass, VC-Static, PrimeTime, Meridian
Responsibilities
Develop and maintain CDC and RDC sign-offs for CPU designs; Recommend System Verilog assertions for CDC/RDC/STA constraints; Develop and enhance STA checks and sign-offs; Debug vendor tool problems; Collaborate with EDA vendors to drive improvements; Work with RTL, Verification, CAD, and Physical Design teams
Seniority
Senior, hands-on IC
