Principal Design Verification Engineer
Core
Lead pre-silicon verification for custom IP and SoC designs, focusing on architectural and micro-architectural functions to ensure design correctness before silicon fabrication.
Role type
Principal Design Verification Engineer (IC)
Builds
Custom Intellectual Property (IP) and System on Chip (SoC) designs for high-performance, efficient functions
Domain
Semiconductor / Hardware Design / AI & ML SoCs
Deliverable
production ML models | product features
Required skills
UVM, C++, Python, Perl, Formal property verification, RTL debugging, functional coverage closure, testbench development, constrained random stimulus, scoreboards, checkers, assertions, makefiles/scripts
Preferred skills
Experience with CPUs, VPUs, GPUs, DMA engines, Tensor units, cross-functional team leadership, Agile methodologies
Technologies
UVM, C++, Python, Perl, RTL, Simulation/Emulation environments
Responsibilities
Create test plans covering verification strategy, requirements, and environments; Write, execute, and debug constrained random stimulus, scoreboards, checkers, and assertions; Develop UVM components for test code and simulation interfaces; Define and implement functional and drive coverage closure; Triage and debug testbench, simulation, and emulation failures; Write scripts for verification infrastructure; Provide technical leadership and mentorship to verification teams.
Seniority
Principal, hands-on IC with strategic leadership
