Senior Verification Engineer
Core
Lead pre-silicon verification for custom IP and subsystem components in AI SoCs, ensuring architectural and micro-architectural intent is met.
Role type
Senior IC design verification engineer (AI SoC/IP)
Builds
Custom Intellectual Property (IP) and Subsystem (SS) components for AI/Machine Learning System on Chips (SoCs)
Domain
Semiconductor / Hardware Design Verification / AI Hardware
Deliverable
production ML models | product features
Required skills
UVM, constrained random stimulus, scoreboards, checkers, assertions, RTL debugging (Verilog), simulation/emulation environments, scripting (Python, Bash, Perl, Zsh), NOC/AXI protocols, formal verification, post-silicon bring-up
Preferred skills
AI/ML SoC experience, CPU/GPU IP verification, complex interconnect fabrics
Technologies
UVM, Verilog, Python, Bash, Perl, Zsh, AXI, AMBA, NOC
Responsibilities
Write, execute, and debug constrained random stimulus, scoreboards, checkers, and assertions; Develop UVM components for verification environments; Collaborate with architecture and design teams; Provide technical leadership through mentorship; Lead pre-silicon verification teams; Deliver complex ASIC/SOC verification from definition to silicon signoff
Seniority
Senior, hands-on IC with leadership responsibilities
