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Principal Silicon Design Subsystem Lead

United States, California, Mountain View💼 Full-time🗓 2026-07-21 → 2026-09-25

Core

Lead the design and verification of cutting-edge custom Intellectual Property (IP) and System on Chip (SoC) subsystems, focusing on high-performance functions for AI/ML and compute workloads.

Role type

Principal Silicon Design Subsystem Lead (Verification & Architecture)

Builds

Custom IP and SoC subsystems for CPUs, VPUs, GPUs, DMA engines, and Tensor units

Domain

Semiconductor / Hardware Design / AI SoCs

Deliverable

production ML models | product features

Required skills

Architectural and micro-architectural design, UVM development, constrained random stimulus, scoreboards, checkers, assertions, functional coverage closure, Python/Perl scripting, Formal property verification, RTL debugging, DFT implementation

Preferred skills

Lead experience across cross-functional teams, experience with multiple product cycles from definition to Silicon, static checks, handoff to physical design

Technologies

UVM, C++, Python, Perl, RTL

Responsibilities

Technically lead one or more Subsystems, develop micro-architectural specifications, create testplans for verification strategy, write and debug verification code, define functional coverage, collaborate on component reuse, mentor team members

Seniority

Principal, hands-on IC with strategic leadership

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