Principal Verification Engineer
Core
Lead pre-silicon verification for custom Intellectual Property (IP) and Subsystem components, focusing on architectural and micro-architectural functions for AI components.
Role type
Principal Verification Engineer (Pre-silicon)
Builds
Custom IP and Subsystem components for AI SoCs
Domain
Semiconductor / Hardware Design Verification
Deliverable
production ML models | product features
Required skills
UVM, constrained random stimulus, scoreboards, checkers, assertions, RTL debugging, simulation/emulation environments, scripting (Python, Bash, Perl, Zsh), AMBA/AXI protocols, interconnect fabrics, NOCs
Preferred skills
AI/Machine Learning SoC experience, formal verification, coverage analysis
Technologies
UVM, Verilog, Python, Bash, Perl, Zsh, AMBA, AXI
Responsibilities
Lead pre-silicon verification team for custom IP and Subsystem components; Collaborate with architecture and design teams to ensure implementation meets intent; Write, execute, enhance, and debug constrained random stimulus, scoreboards, checkers, and assertions; Develop UVM components to interface between test code and verification simulation environments; Provide technical leadership through mentorship and teamwork.
Seniority
Principal, hands-on IC with strategic leadership