Signal and Power Integrity Engineer
Core
Design and simulate end-to-end power delivery and signal integrity solutions for compute and AI SoCs, chiplet architectures, and data center platforms from silicon to system.
Role type
Senior IC Signal and Power Integrity Engineer (HPC/Silicon)
Builds
High-performance compute and AI SoCs, chiplet-based platforms, and data center processor systems
Domain
Semiconductor, High-Performance Computing (HPC), Advanced Packaging, Silicon Design
Deliverable
production ML models | product features
Required skills
Signal and Power Integrity (SIPI) design, DC/AC/transient simulation, IP design, voltage regulator design, motherboard design, CPU package design, decoupling capacitor solution design, high-speed signal design, power integrity modelling, system design, electrical modelling, silicon packaging product development, Foundry Silicon technologies, OSAT technologies, Substrate technologies, Board technology, Platform design
Preferred skills
Chiplet architecture design, advanced packaging expertise, advanced silicon nodes knowledge, cross-functional collaboration, industry trends in Silicon-IP and Platform design
Technologies
DC/AC/transient simulation tools, IP design tools, electrical simulation tools, silicon packaging tools, substrate design tools
Responsibilities
Implement strategies for end-to-end power delivery and signal integrity design from Silicon to Package and Platform to System; Design, model, and simulate SI and PI for data center processors; Perform DC, AC, and transient simulations to validate noise and impedance profiles; Validate I/O performance from platform to silicon; Drive engineering system design decisions involving internal and external stakeholders; Collaborate with silicon architects, platform architects, motherboard designers, thermal architects, and power/performance engineers.
Seniority
Senior, hands-on IC with system-level architecture focus
