Senior DV Engineer
Core
Verify custom ASICs for satellite and wireless telephony systems to ensure connectivity from space.
Role type
Senior Digital Design Verification Engineer (ASIC)
Builds
Custom ASICs for satellite and wireless telephony
Domain
Aerospace / Semiconductor / IoT
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Verilog, SystemVerilog, UVM, Perl, Python, bash
Preferred skills
VHDL, AI-assisted verification
Technologies
Verilog, SystemVerilog, UVM, Perl, Python, bash
Responsibilities
Write verification tests within an existing environment, verify custom ASICs for satellite and wireless telephony
Seniority
Senior, hands-on IC
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