CareerPlan

Senior Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)

San Jose, California, USFull-time$195k2026-07-26 → 2026-11-11
Hybrid

Core

Architect, design, layout, measure, and productize ultra-deep sub-micron-based CMOS products for high-speed optical communications transceivers.

Role type

Senior IC Design Engineer (Analog/Mixed-Signal)

Builds

High-speed serial link ICs (25Gb/s+) for data center and long-haul telecommunication networks

Domain

Semiconductor / Optical Communications

Required skills

High-speed serial link design, CMOS circuit design, analog layout, digital/analog co-design, signal integrity analysis, power integrity analysis, design for manufacturability, ESD design, floorplanning, custom transistor layout

Preferred skills

FinFET technology, high-frequency passive component design, mixed-signal simulation, Cadence Virtuoso, Spectre, Matlab

Technologies

Cadence Virtuoso, Spectre, APS, SpectreX, Matlab, EMX

Responsibilities

Architect and design high-speed AMS circuits; lead large block design efforts; mentor team members; collaborate with packaging and hardware teams; participate in peer reviews

Seniority

Senior, hands-on IC