Senior Analog/mixed-signal IC Design Engineer - Acacia (Hybrid)
Core
Architect, design, layout, measure, and productize ultra-deep sub-micron-based CMOS products for high-speed optical communications transceivers.
Role type
Senior Analog/mixed-signal IC Design Engineer
Builds
High-speed (25Gb/s) analog designs for optical communications products integrated into ASICs
Domain
Semiconductor / Optical Communications / Data Center & Telecommunications
Deliverable
production ML models | product features
Required skills
High-speed serial link design, CMOS product design, analog circuit design, IC simulation and measurement, design for manufacturability, peer review of complex IC designs
Preferred skills
Electrical transceiver applications, FinFET technology, high-frequency layout, passive component design, floorplanning, custom transistor layout, ESD laboratory practices, Cadence Virtuoso, Spectre/APS/SpectreX, Matlab, EMX
Technologies
Cadence Virtuoso, Spectre, APS, SpectreX, Matlab, EMX
Responsibilities
Architect and design ultra-deep sub-micron-based CMOS products; lead efforts for large blocks on complex chips; mentor team members and track deliverables; collaborate with packaging and hardware design teams to ensure signal and power integrity specifications are met; develop high-speed AMS circuits.
Seniority
Senior, hands-on IC
