CareerPlan

Senior Digital ASIC Design Engineer Verification (m/f/d)

Böblingen, BADEN_WUERTTEMBERGRemoteFull-time2026-09-29 → 2026-10-28
Hybrid

Core

Design and verify complex mixed-signal ASICs and digital modules for Advantest's industry-leading automated test systems, taking designs from concept to silicon.

Role type

Senior Digital ASIC Design Engineer (Verification)

Builds

Next-generation semiconductor testing solutions and IC test systems

Domain

Semiconductor / High-tech / Automated Test Equipment

Required skills

RTL coding (Verilog, System-Verilog), ASIC design methodologies, silicon development cycle, verification methodologies, standard simulation tools, UNIX/Linux environment, technical documentation

Preferred skills

IP Architecture development, test plan/cases generation, collaboration with system architects and software engineers

Technologies

Verilog, System-Verilog, UNIX, Linux

Responsibilities

Requirements gathering for IP Architecture, RTL coding of digital modules, verification on module and chip level, documentation of functionality, collaboration with cross-functional teams

Seniority

Senior, hands-on IC