Senior Application Engineer - Design Verification
Core
Senior Application Engineer providing design verification support, integrating proteanTecs IP and DV flows into customer SoC designs, and debugging RTL/gate-level issues for data center, automotive, and consumer device clients.
Role type
Senior IC application engineer (design verification)
Builds
Integrated verification flows and IP for next-gen chips
Domain
Semiconductor / SoC design / Digital verification
Required skills
SystemVerilog, UVM, Testbench architecture, Flow automation, RTL debugging, Gate-level debugging, SoC architecture knowledge, Silicon development flows
Preferred skills
Application engineering experience, Silicon bring-up, CDC/RDC, Formal verification, DFT concepts, Advanced process nodes, Global team collaboration, EDA tools
Technologies
SystemVerilog, UVM, EDA tools
Responsibilities
Serve as primary technical interface for customers in North America, Integrate proteanTecs IP and DV flow into customer environments, Debug customer issues involving RTL and gate-level simulations, Reproduce issues and collaborate with R&D for resolution, Create and maintain application notes and integration guides, Provide structured feedback to R&D and Product Management (via careerplan.io/jobs/D5-00E-6B-46F-senior-application-engineer-design-verification-at-proteantecs)
Seniority
Senior, hands-on IC
