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ASIC Design Engineer 2

Sunnyvale, California, United States of America💼 Full-time💰 $105,500–$213,500🗓 2026-08-26 → 2026-09-26

Core

Design high-speed ASICs for cutting-edge networking chips used in world-class routers and switches, handling tasks from micro-architecture specification to timing closure and debugging.

Role type

Junior ASIC Design Engineer (Networking Chips)

Builds

High-density networking silicon die for routers and switches

Domain

Semiconductor / Networking Hardware

Deliverable

production ML models | product features

Required skills

System Verilog, RTL coding, Digital Logic Design, EDA tools, Timing closure, Functional coverage/SVA

Preferred skills

Computer Architecture, Networking protocols, Python/Perl scripting

Responsibilities

Develop detailed micro-architecture specifications from functional specs, write RTL code, perform timing closure to meet frequency targets, debug design issues, use EDA tools for design checks

Seniority

Junior, entry-level IC

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